Prospect of Graphene Interface Control for Tougher Ceramic Composites

It is important to clarify the theory of interface fracture because confusion about interface cracking persists through the misleading concept of ‘interface strength’ ¹². This has arisen through the largely empirical development of FRPs over the last century, when it was convenient to indent, stretch, bend or shear a composite test sample, observe damage, measure a force, divide by an arbitrary area to give a number with the units of a stress which could be standardised to a certain extent. But it was shown by Griffith ¹³ almost a century ago, when he demonstrated that the force to propagate a crack within an infinite sheet under uniform tension depends on dimensions of length^3/2 not on length².

Cracking depends very much on the geometry of the test piece and on the direction of propagation, so that the force required for cracking can depend on crack length in different ways ¹⁴. The simplest crack is observed in adhesive peeling shown in Figure 2a. The force F to propagate the peel crack at equilibrium is given by

F = bW/2 (1)

where b is the strip width and W the thermodynamic work of adhesion. The force F surprisingly does not depend on the area of contact of the strips.

Figure 2.a) Peeling crack; b) delamination crack

By changing the grip on the strips, (Figure 2b) the crack turns into a delamination or so-called ‘overlap joint’ configuration where the crack travels in the same direction as the applied force, strangely perpendicular to a Griffith crack. Applying the same fracture mechanics analysis to this arrangement gives the solution for force F at equilibrium ¹³

F= b(4WEd)^1/2(2)

where W is interfacial work of adhesion, E Young’s modulus and d strip thickness. This equation has the same dimensions as the Griffith equation but the propagation force here does not change as the delamination proceeds, whereas the Griffith crack accelerates with crack extension.

In practice, observing cracks in thermodynamic equilibrium ¹⁵ is not straightforward and the fracture resistance, R, is often found to be several times greater than W. This is due to energy losses that can occur in the sample during cracking. These increase with both crack speed and temperature.

However, in peeling, cracking is stable. Plotting experimental results in Figure 3 for R, the real measured interface cracking energy, for both the peel and delamination tests of Figure 2 show that equations 1 and 2 are valid but exhibit widely different fracture forces for the two geometries, while giving crack force dependence on speed of fracture ¹³.

Figure 3.Plots of crack line force results for two tests as function of crack speed showing increase of force with speed and higher force for delamination crack than for peeling. The lines are equations 1) and 2) with R replacing W.

The most interesting feature of such an analysis is that equation 2 has similar dimensional form to the Griffith crack equation so that dividing equation 1 by equation 2 gives a simple number around 10 ¹⁶ where R_c is the cohesive fracture energy for Griffith cracking, R_a is adhesive fracture energy of the delaminating interface and ν is Poisson’s ratio

R_c/R_a = 4π (1- ν²) (3)

In other words, the condition for a Griffith crack to be deflected at an adhesive interface is that the adhesive interface fracture energy must be about ten times less than the ceramic fracture energy. Interface strength cannot enter this theory.

These ideas are relevant to laminar interfaces in composites because they were used successfully in ^{5, 11} to interpret the results seen in ceramic laminate composites. But there are two other parameters to be taken into consideration. One is an elastic modulus change at the interface as the crack approaches ¹⁷. A crack finds it difficult to penetrate a higher modulus material. Effectively, the toughness can increase by a factor E₂/ E₁ as a crack moves from a low modulus component E₁ into a high modulus region E₂¹³. The second parameter is crack healing and peeling as smooth crack surfaces are pulled back into contact by surface forces to form interfacial dislocations ^{18, 19, 20}. When a smooth surface revealed by delamination heals in a new position, more energy must be dissipated to break the interface repeatedly, giving increased energy loss and therefore more toughness ¹³, as indicated by phenomena observed in fracture of nacre, which has a laminated structure with low interface fracture energy.

The major difficulty in this area is that very little is known about interfaces between ceramics and graphene and this is an area where significant further study is required. Measurements of the interface adhesion fracture energy, its dependencies on crack speed and temperature, the influence of the atoms attached to the graphene platelets, the effects of processing temperatures and environments; none of these are known or understood at present.

One exceptional paper appeared in 2010 from Wan’s group ²¹. A thesis from Li, one of his PhD students, puts the ideas in timely perspective ³⁸. 50nm diameter gold nanoparticles were spread thinly on a (100) silicon wafer oxidised with a layer 280nm thick. Graphene sheets were mechanically cleaved from the surface of highly oriented pyrolytic graphite (HOPG-ZYH grade from NT-MDT Co., Moscow, Russia) using the celebrated method of Scotch tape peeling ^{22, 23}. The tape carrying the adhered small flakes of graphite was then brought into contact with the Si substrate in dry condition, trapping a number of gold particles at the graphene-silicon interface. The thick silicon substrate suffered negligible deformation and was taken to be rigid, while the thin graphene sheet bent and formed a blister, in which the van der Waals forces pulling the graphene flake into contact with the wafer were balanced at equilibrium by the elastic reaction of the deformed flake. The measured interfacial adhesion energy R was calculated from the particle height and blister radius measured by scanning electron microscopy using the thin clamped membrane equation and energy balance crack equation ²⁴

R = Eh (w/r)⁴ /16(4)

where E=0.5TPa was the elastic modulus of the graphene sheet, h=1.7nm its thickness, 5 layers, w the diameter of the gold particle and r the blister radius. R was found to be 0.151±0.028 Jm^-2.

It is difficult to say how near this value of R=0.151 Jm^-2 is to the equilibrium work of adhesion W. To understand that, and to see the effects of crack speed, it would be necessary to observe the peeling and healing of the graphene sheet on the wafer with time and environmental conditions, as was achieved with elastomeric materials many years ago ²⁵. Of course, placing a graphite flake on a substrate under ordinary atmospheric and rough conditions is unlikely to give a realistic value of R = W, due to the presence on both surfaces of adsorbed chemical groups (Figure 4).²¹

Figure 4.a) SEM image of blister showing the central nanoparticle as a black spot; b) 3D schematic diagram of the blister; c) cross-section of the blister on the substrate with the central nanoparticle deforming the graphene platelet as an elastic membrane 21. Reproduced from Zong et al, J Appl Phys 107(2010)026104, with the permission of AIP Publishing.

Since 2010, several interesting papers have followed to consider the interfacial fracture energies of graphene in contact with oxide and other surfaces. Reference ²⁶ was the first report of interface fracture energy for a large surface area graphene monolayer grown by CVD on copper. One interesting development was to consider a more standard interface fracture energy test than the blister method, which is not generally applicable to laminate systems. The double cantilever beam (DCB) method in contrast is widely favoured for laminates and has a long track-record for polymer composites ²⁷. A target substrate was bonded with epoxy resin to the graphene surface (Figure 5)²⁶ and bending cleavage forces applied. The value of R=0.72±.07 Jm^-2 was determined under ambient room conditions. However, the velocity of the crack was not determined, and the dependence of R on speed and temperature is unknown. If epoxy resin had been used to form one of the cantilever arms, then the crack would have been visible and these parameters could have been observed as a function of temperature. Also, if the copper had been reacted to form oxide or other ceramic material, a measurement of a graphene-ceramic interface fracture resistance would be possible.

Figure 5.DCB test for measuring interface fracture energy of graphene to copper 26. reprinted with permission from Yoon, T. et al (2012) Nano Lett. 12, 1448-1452 copyright 2012 American Chemical Society.

Another step forward was the realisation that the interface fracture energy could increase significantly with the ceramic processing conditions ²⁸. Using a nano-scratch adhesion measurement method, which is easy but unreliable, the as-transferred graphene adhered to SiO₂ with R= 3Jm^-2, a high value. But after rapid temperature rise and vacuum annealing, R rose to 10 and even 20Jm^-2. The suggestion from XPS profiling was that C-O and C=O chemical bonds were forming at the interface to enhance the usual van der Waals interactions.

Most measurements of the fracture resistance of graphene interfaces have been made using the blister test ^{29, 30, 31, 32, 33, 34, 35, 36}. This shows a range of features. Koenig et al. ^{29, 30} measured the adhesion of micromechanically exfoliated graphene on SiO₂, obtaining 0.45 Jm^-2 for monolayer graphene and 0.31Jm^-2 for two to five layered graphene. Under nominally similar conditions, Boddeti et al. ³¹ found the adhesion energy for the graphene/silicon interface to be 0.250 Jm^-2, which suggests some variability in these measurements.

Liechti’s group at University of Texas focussed on transferring a CVD grown graphene layer from copper to polished silicon wafers and polished copper surfaces with measured roughness ^{32, 33, 34, 35, 36}. They measured R=0.34 Jm^-2 at steady state but found interesting changes as mixed-mode cracking was introduced by changing the thickness of the polymer film used as backing for the graphene. They interpreted this effect in terms of surface asperity locking.

Interface fracture measurements on the as-grown CVD film gave higher values of R ranging from 0.74 to 1.53 Jm^-2 depending on the copper surface treatment creating nano roughness ^{34, 35, 36}. Rougher surfaces gave higher adhesion for CVD films whereas the transferred films gave lower adhesion at higher roughness. Such effects are well established in the adhesives industry where roughening a surface prior to setting the adhesive increases adhesion whereas pressure sensitive adhesion is reduced on roughened substrates. Transfer of graphene films may trap molecules or asperities which lower the adhesion, while further processing of the composite (eg by sintering) could increase the adhesion through annealing.

A more recent paper shows that there is a shear zone outside the blister edge, indicating sliding of one graphene sheet over the other. From the optically observed strains, a shear stress of 40 kPa could be calculated ³⁷. This could be relevant to formation of interfacial dislocations in the displacing layers causing energy dissipation as a crack propagates. This is likely to depend significantly on the number of graphene layers in the sheet, allowing adhesion tuning. Gao et al ³⁹ showed by blister testing that the R = 0.453 Jm^-2 for monolayer, 0.317 Jm^-2 for 3-5 layers and 0.276 Jm^-2 for 10-15 layer graphene. Further recent analysis of blisters has continued ⁴⁰ but the elastic processes analysed are much less significant than those arising from crack speed, temperature and irreversible loss effects, so may probably be neglected as academic hair splitting.

By far the most popular method for making ceramic composites has been that of mixing nanoparticles with the ceramic powder, then compacting, followed by spark sintering. Much previous study of carbon nanotube additions to ceramic powder processes ^{41, 42, 43, 44, 45, 46, 47, 48, 49, 50} had shown the potential for improving hardness, strength, toughness and other desirable characteristics. It was logical to try the same experiments using graphene additions. The advantage of graphene over nanotubes is to produce large, smooth and controlled interfaces in ceramic laminate materials, with easy dispersion and high toughness. Furthermore nanotubes are relatively short, so that their potential for crack bridging and increasing toughness is rather limited; graphene platelets can be more extended.

A further area where graphene may give benefits is that it can be introduced as a thicker interphase layer, that might itself be toughened. This would limit the extent of crack growth along the laminae, which in the early materials, could reach almost to the ends of the sample.

The review ⁵¹ in 2013 showed that encouraging property improvements were being achieved with graphene in various ceramic matrices, especially electrical properties shown in Figure 6^{42, 51, 52, 64} The specific benefits were dependent on the graphene source and preparation, the mixing and compaction methods, then the sintering techniques. In this section we consider the bulk manufacturing processes. Then the next section deals with special processes for making functional ceramics, especially electrical components.

Figure 6.Increase in electrical conductivity (GO-YSZ) (GNP-Si3N4) (GNS alumina) FLG (Al2O3) [42, 51, 52, 64].

Bulk ceramic composite investigations have largely used graphene made from graphite, either by mechanical delamination, by the Hummer chemical splitting method to form graphene oxide, or by the electrolytic method. The largest demand is for polymer composites ⁵³ but the same graphene preparations will also be applicable to ceramic products. High shear exfoliation using new designs of machine plus ultrasonic treatment has been of great interest ⁵⁴. Combined with the electrolytic method (figure 7)⁵³ using chemical additives to get between the graphene layers ⁵⁵, followed by centrifuging to separate the nanoparticles, high yields of around 20% have been demonstrated.

Figure 7.a) The electrolytic exfoliation of pure graphite; b) high shear mechanical splitting 53.

Hummers method produces graphene oxide which is highly defective and needs to be reduced to get the graphene flakes back to their original condition. To produce graphitic oxide using modified Hummer’s method, commercially available graphite powder is treated with sodium nitrate (NaNO₃), sulphuric acid (H₂SO₄) and potassium permanganate (KMnO₄) at 0^oC for 2 h. After stirring the mixture for 30 min at room temperature, distilled water is slowly added while maintaining the temperature below 98^oC for 3h. The mixture is subsequently treated with hydrogen peroxide (H₂O₂) followed by filtering and washing with distilled water. After dispersing the mixture in distilled water and ultasonicating for 15 min, the dispersion is centrifuged and stable supernatant containing GO is collected ⁵⁶.

The earliest ceramic mixing method was ball milling the graphene, typically with N-Methyl Pyrrolidone (NMP) and/or alcohol as the fluid dispersant, then adding the ceramic powder, for example alumina, zirconia, silica or silicon nitride, followed by filter pressing to compact. Colloidal processing has also been successful, by mixing colloidal stable dispersions of the graphene and the ceramic particles. In a recent example, alumina powder was suspended drop by drop to produce a well dispersed mix which was castable by normal ceramic methods. Sol gel and polymer based ceramic methods have also been used to produce thin coatings or porous ceramics for lithium battery electrodes ⁵¹.

The main difficulty in processing the graphene ceramic composites is the sintering step. Pressureless sintering, as normally used in the bulk ceramics industry, takes too long at high temperature leading to degradation of the graphene plus large grain growth. Hot pressing and isostatic hot pressing have been used to produce dense samples quickly ⁵⁷. The graphene addition to the ceramic matrixes varied from 1 wt.% to 2 wt.%. Graphene composites with Alumina were prepared using commercial powder: submicron aluminium oxide (0.1 μm, Taimicron TM-DAR of Taimei CHEMICALS CO., LTD) and nanometric graphene Gn(4) of Cheap Tubes, USA with following parameters: Colour: black, purity: 99 %, average flake thickness: 4 nm, average particle (lateral) size: 1–2 μm, specific surface area: >700 m²/g. The powder mixtures were homogenized for 10 h in propanol using a rotary-vibratory mill and alumina grinding media. Dried and granulated powders were hot-pressed (Thermal Technology LLC) at 1400 °C for 1 h under 25 MPa in argon flow. The heating rate was 10 °C/min to make 50mm samples.

Si₃N₄–graphene composites were made of commercial submicron silicon nitride (0.5–0.8 μm, Grade M11 of H.C. Starck) and the same nanometric graphene Gn(4). For the activation of the sintering, the aluminium nitride (0.8–1.8 μm, Grade C of H.C. Starck) and yttrium oxide (0.5–0.8 μm, Grade C of H.C. Starck) powders, with the 2.5 wt.% and 4 wt.% were used. The powder mixtures were homogenized for 6 h in propanol using a rotary-vibratory mill and silicon nitride grinding media. Dried and granulated powders were hot-pressed (Thermal Technology LLC) at 1750 °C for 1 h under 25 MPa in nitrogen flow. The heating rate was 10 °C/min making 50mm samples.

Spark plasma sintering has been the main innovation giving finer grains at shorter firing times. The composite mix, the punch and the die are both Joule heated at around 100K/min and pressing can give up to 1 GPa to sinter in a few minutes at relatively low temperature.

The properties of the graphene reinforced ceramics made by these methods were somewhat improved. Typically bending strength rose by 60% and indentation toughness K_1c rose from 4 to 5 MPa m^1/2 for alumina and from 5 to 6MPa m^1/2 for Si₃N₄. Fracture surfaces showed that pull-out of the graphene flakes interfered with crack propagation. Electron microscopy showed excellent contact between graphene platelets and ceramic crystallites and crack deflection mechanisms (Figure 8)². However, the measured toughnesses are still somewhat low, suggesting that the graphene layers are not continuous, possibly due to reaction with the underlying ceramic substrate, suggesting that layers need to be either thicker or substrates inert to graphene.

Figure 8.Electron microscope pictures showing graphene influencing cracks in the ceramic composite 2 reprinted with permission from Miranzo, P., Belmonte, M., Isabel Osendi, M., (eds) (2017) Graphene ceramic composites, J Euro Ceram Soc 37, 3647-3822.

Significant improvements were shown for SiC/graphene composites ⁵⁸. Briefly, two separate suspensions using alcohol (ethanol or isopropyl alcohol) as liquid media were first prepared to disperse and homogenize their components, in particular, one attrition milled ceramic slurry with a powder composition formed by 93 wt.% of β-SiC powders (BF-17A, H.C. Starck GmbH) plus 5 wt.% of Y₂O₃ (Grade C, H.C. Starck) and 2 wt.% of Al₂O₃ (SM8, Baikowski Chimie), and another one containing the selected graphene fillers (GNPs or GOs) that was sonicated. Afterwards, both suspensions were blade mixed and sonicated, and the dried and sieved powders were spark plasma sintered (SPS, SPS-510CE, Fuji Electronic Industrial Co., Ltd.) at 1800 °C for 5 min, applying 50 MPa of uniaxial pressure and using a vacuum atmosphere of 6 Pa. Disc shaped specimens of approximately 20 mm diameter and 3 mm height were obtained. The different materials selected for this study were the reference monolithicSiC (“SiC”) and SiC composites containing 5, 10 and 20 vol.% of added GNPs (“5GNPs”, “10GNPs”, “20GNPs”), and a composite with 5 vol.% of reduced GOs (“5rGOs”). Hertzian contact tests were performed in air by indenting (Zhu 2.5, Zwick/Roell GmbH & Co.) 1 μm diamond polished and gold coated specimen surfaces with tungsten carbide (WC-6% Co) spheres of 1.25 and 2.50 mm of radius. The specimens were placed so that the basal plane of the graphene fillers was oriented parallel to the tested surface, i.e., perpendicular to the SPS pressing axis. the addition of GNPs to SiC led to a remarkable increment in the fracture toughness (from 3.2 to 5.9 MPam^1/2) giving almost 4 times the fracture energy. The penalty was hardness reduction by 20 to 30%.

Mixing graphene nanoparticles with ceramic powders, then sintering the products, has shown significant but not stunning property improvements. The challenge is to design laminated structures which can give better results than random mixing, as pioneered in ⁵. A recent embodiment of this idea is given by Belmonte et al ⁵⁹. They were striving to obtain directional conductivity in a Si₃N₄ composite laminated with graphene layers 200nm thick across the whole sample area. 5 such layers were embedded as shown by dark lines in Figure 9b⁵⁹. An additional benefit should be increased toughness as cracks were impeded at the graphene interfaces.

Figure 9.a) Test samples of Si3N4/graphene laminated composite; b) Edge view after cracking from the top, showing some crack deviation at the graphene layers (the scale bar should read 1mm); c) fracture surface bumps showing crack deviation near graphene layer; d) no sign of deviation on control Si3N4; e) Comparison of properties for Si3N4 control and Si3N/ Graphene oxide laminate; f) indentation cracking picture with plot of toughness increase with indentation load for graphene laminate; g) detail of crack deviation at graphene layer 59 reprinted with permission from Belmonte, M., Nistal, A., Cruz-Silva, R., Morelos-Gomez, A., Terrones, M., et al (2015) Advanced Electronic Mater. 1, 1500132.

The results were affected by the reaction of the silicon nitride with graphene to form silicon carbide, but the small volume fraction (0.03%) of added graphene oxide gave 16 orders of magnitude increase in electrical conductivity in the plane of the laminations. For random mixed graphene such an increase in electrical conduction would require 7.2% of such flakes. The toughness increase was only 15% rise in K_1c which is marginal, presumably because the interfaces were not substantially deflecting the crack. By hardness measurement, the increase in K_1c was up to 60% as the indentation proceeded.

Another paper using laminated and sintered ZrB₂ mixed with graphene plus SiC/graphene layers was shown to give increased bending strength and fracture toughness, because the cracks were in this case inhibited by the layered structure of the pressed product after spark sintering ⁶⁰. Figure 10 shows how strength went up by 200 to 500% and K_1c rose from 2 to 6MPam^1/2 and from 4 to 9.6 MPam^1/2, rather impressive gains.

Figure 10.Bioinspired laminated strength and K1c increases for layered ZrB2 SiC mixes with graphene 60

Significant numbers of publications are appearing on use of graphene in electronic applications due to the remarkable electronic properties of graphene films. Such functional composite ceramics may prove to have interesting potentials. In a review ⁶¹ application benefits and drawbacks were discussed in relation to infrared (IR) devices, electro-optic (EO) devices, and field effect transistors (FET) for radio frequency (RF) applications. Graphene may provide interesting solutions for certain electronic applications such as the channel in a field effect transistor, since it can be doped electrostatically and has extremely high mobility allowing for quick response (high operating frequency). The replacement of Si by graphene for logic gates might be considered due to the high potential switching speed, however the absence of a band gap means that a relatively large bandgap would have to be induced through a variety of doping or other symmetry breaking mechanisms. Graphene has the highest mobility values measured in a material at room temperature making integration into fast response time devices such as a HEMT (high electron mobility transistors) for RF applications. It has been shown that although the integration of graphene is challenging due to mobility degradation from surface contamination and trapped states in the oxide dielectric that a graphene RF detector with an overall response frequency of 300Ghz may be achieved utilizing a three-terminal design on a SiC substrate with a channel length of 40nm.

Graphene use in optical devices is limited ⁶⁰ due to the absorption of 2.3% of incident light per layer making graphene’s use for optical devices a trade-off between getting enough layer for good optical absorption and modulation versus restricting number of layers for fast carrier propagation. On its own graphene in not practical for use as a waveguide or modulator but when it is combined with already active materials it increases the performance of such devices thus an EO modulator utilizing a stacked graphene-BN capacitor along with a Si microcavity array displays the ability to modulate light at a rate of 1.2 GHz.

Graphene for IR detectors has shown some promising results utilizing graphene in thermal-based detection regimes since the photon-based absorption regimes all require inducing a bandgap adding complexity and reliability issues. The unique thermal-based properties of graphene either in a traditional bolometric type of device or one based upon current produced from the photoelectric effect allowed for the creation of a graphene IR detector with sensitivity to a 2.5THz (119μm) laser.

Another application for faster nano-electronics is using fluorinated graphene to facilitate germanium replacing slower silicon devices ⁶². Insulating fluorinated graphene can act as an efficient diffusion barrier layer to suppress the formation of the unstable interfacial oxide in Ge-based devices. The Ge-based device with the fluorinated graphene exhibits negligible capacitance versus voltage hysteresis, extremely low leakage, and superior equivalent oxide thickness compared to silicon.

The interface control needed for crack control may also be useful for electronic devices as shown by Jung et al ⁶³. Considering each interface encountered during the fabrication of graphene devices, from the graphene/metal growth substrate to graphene/high-k gate dielectrics, it is important to control the interface structure and properties at the atomic level. For effective delamination and transfer of graphene, adhesion at the interface of the graphene/metal growth substrate or graphene/target substrate should be engineered by appropriate weakening or strengthening methods for those interfaces. In terms of graphene delamination using polymer adhesives or a carrier layer, questions remains about which functional groups in the polymer play a critical role to induce delamination of graphene. This should be investigated systematically by applying reagents having various functional groups to graphene delamination systems, in conjunction with an investigation of doping effects that might be induced from the chemical groups. After graphene is transferred onto a target substrate, interfacial issues arise from the atom-thickness of graphene and the surface-graphene interactions. Since the surface states of substrates significantly affect the overall electrical properties of graphene devices, as well as the cleavage properties, substrates with a chemically inert, dangling-bond-free flat surface as well as high surface phonon energy are highly demanded. Although h-BN is an ideal substrate in terms of realizing high performance graphene electronics, obtaining reliable, large-area synthesis methods for h-BN beyond mechanical exfoliation is still a challenging issue. On the other hand, alternative substrate materials, such as AlN, are attractive, as highlighted in ⁶². To deposit a high-k dielectric using ALD, it is necessary to introduce seed materials onto graphene due to the chemically inert surface of graphene or to generate seeding centers on graphene itself. These approaches cause heterogeneous dielectric stacks (or interfaces) and give rise to difficulty in controlling the film thickness, thereby constraining the scaling of gate dielectric thickness. A novel approach for the deposition of gate dielectrics therefore should be explored to achieve a single component gate dielectric that forms a homogeneous interface without the application of additive seed layers. One example would be the deposition of ultrathin (less than 10 nm) dielectrics by the initiated CVD method. The use of ultrathin dielectrics in graphene FETs would also be desirable for the development of flexible electronic devices. In summary, interface control is vital both for crack control and electronic applications. Several reviews have mechanical bias, but the electronic nature of the interface must be closely considered ⁶⁴.

Thanks are due to Dr Siva Bohm and Professor Andrea Ferrari at Cambridge Graphene Centre for discussing these points in a very positive way.